Getting started in verilog FPGA design with Arrow's LPRP Altera board

Arrow's LPRP board has lots of stuff, but a simple getting started project would be to just blink a LED. The oscillator clock to the FPGA is 48 MHz, we'll divide it down.

blink.v:

  module blink (
    input CLK_48_MHZ,
    input USER_PB,
    output [3:0] USER_LED) ;
    wire reset_l = USER_PB ;
    reg [27:0] count1 ;
    always @ (posedge CLK_48MHZ or negedge reset_l)
      if (~reset_l)
        count1 <= 0 ;
      else
         count1 <= count1 + 1 ;
    assign USER_LED = count1[27:24] ;
  endmodule